1. Field of the Invention
The present invention relates to a chopper stabilized amplifier.
Priority is claimed on Japanese Patent Application No. 2010-195764, filed Sep. 1, 2010, the content of which is incorporated herein by reference.
2. Description of the Related Art
All patents, patent applications, patent publications, scientific articles, and the like, which will hereinafter be cited or identified in the present application, will hereby be incorporated by reference in their entirety in order to describe more fully the state of the art to which the present invention pertains.
Chopper stabilized amplifiers are widely used as low-noise, low-drift direct-current amplifiers (see, for example, Japanese Unexamined Patent Application, First Publication No. S61-89704). The structure of a conventional chopper stabilized amplifier will now be described using FIG. 10. FIG. 10 is a circuit diagram illustrating the structure of a conventional chopper stabilized amplifier. A chopper stabilized amplifier CHOP_AMP shown in FIG. 10 includes an input terminal INP, an input terminal INM, an operational amplifier circuit AMP, a modulation circuit MOD, a demodulation circuit DEMOD, a load capacitor CLM, a load capacitor CLP, an output terminal OUTP and an output terminal OUTM.
A signal VIN(t) that is input through the input terminal INP and the input terminal INM is input into the modulation circuit MOD. A modulation signal CK1 and a modulation signal nCK1 are input into the modulation circuit MOD from the outside, and the modulation circuit MOD modulates the signal VIN(t) using the modulation signal CK1 and the modulation signal nCK1, and then outputs this signal to an input terminal of the operational amplifier circuit AMP as a first modulated signal Vmod1.
The first modulated signal Vmod1 that is input into the operational amplifier circuit AMP is amplified by the operational amplifier circuit AMP so as to become a second modulated signal Vmod2 which is then output to the demodulation circuit DEMOD. The modulation signal CK1 and the modulation signal nCK1 are input into the demodulation circuit DEMOD from the outside, and the second modulated signal Vmod2 is demodulated by the modulation signal CK1 and the modulation signal nCK1, and is then output from the output terminal OUTM and the output terminal OUTP as an output signal OUT(t).
The load capacitor CLM is connected between an inverting output terminal of the operational amplifier circuit AMP and the ground, while the load capacitor CLP is connected between a non-inverting output terminal of the operational amplifier circuit AMP and the ground. These capacitors are parasitic capacitors, or else compensation capacitors that enable the amplifier to operate stably.
The modulation circuit MOD and the demodulation circuit DEMOD will now be described. The modulation circuit MOD includes a switch unit S1, a switch unit S2, a switch unit S3, and a switch unit S4. The switch unit S1 is interposed between the input terminal INP and a non-inverting input terminal of the operational amplifier circuit AMP, while the switch unit S2 is interposed between the input terminal INM and the inverting input terminal of the operational amplifier circuit AMP. The switch unit S3 is interposed between the input terminal INP and the inverting input terminal of the operational amplifier AMP, while the switch unit S4 is interposed between the input terminal INM and the non-inverting input terminal of the operational amplifier circuit AMP.
The modulation signal CK1 is supplied to the switch unit S1 and the switch unit S2, and the switch unit S1 and the switch unit S2 are switched on when the modulation signal CK1 is at a high level (hereinafter, indicated by “H”), and are switched off when the modulation signal CK1 is at a low level (hereinafter, indicated by “L”). The modulation signal nCK1 is supplied to the switch unit S3 and the switch unit S4. The switch unit S3 and the switch unit S4 are switched on when the modulation signal nCK1 is at “H”, and are switched off when the modulation signal nCK1 is at “L”.
The demodulation circuit DEMOD includes a switch unit S1′, a switch unit S2′, a switch unit S3′, and a switch unit S4′. The switch unit S1′ is interposed between the inverting output terminal of the operational amplifier circuit AMP and an output terminal OUTM, while the switch unit S2′ is interposed between the non-inverting output terminal of the operational amplifier circuit AMP and an output terminal OUTP. The switch unit S3′ is interposed between the inverting output terminal of the operational amplifier circuit AMP and the output terminal OUTP, while the switch unit S4′ is interposed between the non-inverting input terminal of the operational amplifier circuit AMP and the output terminal OUTM.
The modulation signal CK1 is supplied to the switch unit S1′ and the switch unit S2′. The switch unit S1′ and the switch unit S2′ are switched on when the modulation signal CK1 is at “H”, and are switched off when the modulation signal CK1 is at “L”. The modulation signal nCK1 is supplied to the switch unit S3′ and the switch unit S4′. The switch unit S3′ and the switch unit S4′ are switched on when the modulation signal nCK1 is at “H”, and are switched off when the modulation signal nCK1 is at “L”.
A chopping operation (i.e., a modulation operation and a demodulation operation) of the conventional chopper stabilized amplifier CHOP_AMP will now be described with reference made to FIG. 10 and FIG. 11. FIG. 11 is a timing chart illustrating waveforms of the modulation signal CK1 and the modulation signal nCK1.
The modulation circuit MOD uses the four switches that are switched on and off by the modulation signal CK1 that has a rectangular waveform that changes periodically at a predetermined frequency, and by the modulation signal nCK1 that has a rectangular waveform and whose phase is offset by 180° from that of the modulation signal CK1 to control which of the output terminal OUTM and the output terminal OUTP the output signals output from the non-inverting output terminal and the inverting output terminal of the operational amplifier circuit AMP are input into.
Because the modulation signal CK1 is at “H” and the modulation signal nCK1 is at “L” from the timing t1 to the timing t2, the switch unit S1 and the switch unit S2 are switched to on, and the switch unit S3 and the switch unit S4 are switched to off. As a result of this, the input terminal INP is connected to the non-inverting input terminal of the operational amplifier circuit AMP, and the input terminal INM is connected to the inverting input terminal of the operational amplifier circuit AMP.
In contrast, because the modulation signal CK1 is at “L” and the modulation signal nCK1 is at “H” from the timing t2 to the timing t3, the switch unit S1 and the switch unit S2 are switched to off, and the switch unit S3 and the switch unit S4 are switched to on. As a result of this, the input terminal INP is connected to the inverting input terminal of the operational amplifier circuit AMP, and the input terminal INM is connected to the non-inverting input terminal of the operational amplifier circuit AMP.
Moreover, in the same way as the modulation circuit MOD, the demodulation circuit DEMOD uses the four switch units that are switched on and off by the modulation signal CK1 and by the modulation signal nCK1 to control which of the output terminal OUTM and the output terminal OUTP the output signals output from the non-inverting output terminal and the inverting output terminal of the operational amplifier circuit AMP are input into.
Because the modulation signal CK1 is at “H” and the modulation signal nCK1 is at “L” from the timing t1 to the timing t2, the switch unit S1′ and the switch unit S2′ are switched to on, and the switch unit S3′ and the switch unit S4′ are switched to off. As a result of this, the non-inverting output terminal of the operational amplifier circuit AMP is connected to the output terminal OUTP, and the inverting output terminal of the operational amplifier circuit AMP is connected to the output terminal OUTM.
In contrast, because the modulation signal CK1 is at “L” and the modulation signal nCK1 is at “H” from the timing t2 to the timing t3, the switch unit S1′ and the switch unit S2′ are switched to off, and the switch unit S3′ and the switch unit S4′ are switched to on. As a result of this, the inverting output terminal of the operational amplifier circuit AMP is connected to the output terminal OUTP, and the non-inverting output terminal of the operational amplifier circuit AMP is connected to the output terminal OUTM.
Next, using FIG. 12, a description of the input signal frequency characteristics and noise at the main nodes of the conventional chopper stabilized amplifier CHOP_AMP will be given. The graphs (a) through (f) in FIG. 12 show the signal amplitude—frequency characteristics of the respective main nodes. The vertical axes show amplitude, while the horizontal axes show frequency. The operational amplifier circuit AMP has the input referred noise Vn shown in the graph (c), and the modulation circuit MOD and the demodulation circuit DEMOD modulate input signals by making repeated switches using the modulation signal CK1 and the modulation signal nCK1 (i.e., a square wave having the frequency f).
Namely, when an input signal VIN(t) having the frequency characteristics shown in the graph (a) is input, the input signal is modulated by the modulation signal CK1 and the modulation signal nCK1 in a modulation circuit MOD, and changes to a first modulated signal Vmod1 that has the frequency characteristics shown in the graph (b). As a result of this, the input signal VIN(t) is modulated to a signal whose frequency is an odd multiple of the frequency of the modulation signal CK1 and the modulation signal nCK1 that control the chopper processing of the modulation circuit MOD.
Next, the input referred noise Vn shown in the graph (c) is added to the first modulated signal Vmod1 in the input terminal of the operational amplifier circuit AMP, and a second modulated signal Vmod2 which is amplified by the operational amplifier circuit AMP changes to a signal having the frequency characteristics shown in the graph (d). The demodulation circuit DEMOD demodulates the second modulated signal Vmod2 to the frequency band of the input signal (i.e., a low-frequency band which includes direct current) using the modulation signal CK1 and the modulation signal nCK1, and outputs an output signal OUT(t) having the frequency characteristics shown in the graph (e). At this time, the demodulation circuit DEMOD modulates the input referred noise Vn of the operational amplifier circuit AMP to a signal whose frequency is an odd multiple of the frequency of the modulation signal CK1 and the modulation signal nCK1 used for the demodulation.
Not only is the amplified input signal included in the output signal OUT(t) which is output finally from the demodulation circuit DEMOD, but components of the input referred noise Vn which is modulated to a signal whose frequency is an odd multiple of the frequency of the modulation signal CK1 and the modulation signal nCK1 are also included therein. Because of this, a low-pass filter (LPF) is provided on the output side, and the input referred noise Vn that has been modulated to a signal whose frequency is an odd multiple of the frequency of the modulation signal CK1 and the modulation signal nCK1 as well as the offset voltage component are removed by this low-pass filter, and an output signal LPOUT(t) having the frequency characteristics shown in the graph (f) can be obtained. Namely, the above described chopper stabilized amplifier suppresses the effects of the input referred noise of the operational amplifier circuit AMP, and is able to amplify only the frequency components of the input signal.
Here, a description will be given using FIG. 13 of the signal waveform in the main node of the conventional chopper stabilized amplifier CHOP_AMP. FIG. 13 is a timing chart illustrating the voltage signal at each node of the conventional chopper stabilized amplifier CHOP_AMP. In order to simplify the description, the voltages at each node shown in FIG. 13 are displayed with only one channel (for example, a system connected in the following sequence: the input terminal INP—the non-inverting input terminal of the operational amplifier circuit AMP—the non-inverting output terminal of the operational amplifier circuit AMP—the output terminal OUTP) of the operational amplifier circuit AMP, which is a fully differential amplifier, being used as representative thereof. The other channels may be thought of as channels in which the signal of the channel being displayed as a representative is vertically inverted. Moreover, in the present description, it is assumed that there are no limits on the frequency characteristics and slew rate of the operational amplifier circuit AMP. Note that in all of the timing charts shown in FIG. 13, the vertical axis shows the voltage while the horizontal axis shows the time.
The following description is given based on the sine wave shown in the graph (b) of FIG. 13 being input into the input terminal INP as the input signal VIN(t) in the chopper stabilized amplifier CHOP_AMP, and on a signal obtained by vertically inverting the sine wave shown in the graph (b) of FIG. 13 being input into the input terminal INM. In the modulation circuit MOD, the input signal VIN(t) shown in the graph (b) of FIG. 13 is modulated by the modulation signal CK1 and the modulation signal nCK1. However, the modulation signal CK1 has the shape shown in the graph (a) of FIG. 13. Moreover, although the modulation signal nCK1 changes in an inverse phase of the modulation signal CK1, this is not shown in the drawing.
Because the multiplication of the input signal VIN(t) and the modulation signal CK1 is performed in the modulation circuit MOD, the first modulated signal Vmod1 shown in the graph (c) of FIG. 13 is ultimately output, and this is input into the non-inverting input terminal of the operational amplifier circuit AMP. This signal is amplified by the operational amplifier circuit AMP and becomes the second modulated signal Vmod2. The second modulated signal Vmod2 is input into the demodulator circuit DEMOD, and is demodulated by the modulation signal CK1 (shown in the graph (e) of FIG. 13) and the modulation signal nCK1. The demodulated signal forms a sine wave such as that shown in the graph (f) of FIG. 13. The output signal LPOUT(t) that has passed through the low pass filter which is provided in order to remove input referred noise components which have been modulated to a signal whose frequency is an odd multiple of the frequency of the modulation signal CK1 and the modulation signal nCK1 has the shape shown in the graph (g) of FIG. 13.
In the above explanation, a description has been given of a case in which there are no limits on the frequency characteristics and slew rate of the operational amplifier circuit AMP. However, in actuality, the operational amplifier circuit AMP does have a limited slew rate and limited frequency characteristics. Furthermore, the load capacitor CLM and the load capacitor CLP that enable the amplifier to operate stably are present at the output terminals of the operational amplifier circuit AMP. Accordingly, in an actual operational amplifier circuit AMP, the amplification factor of the high frequency components of the first modulated signal Vmod1 ends up being lower than the amplification factor of the low frequency components of the first modulated signal Vmod1.
The voltage waveforms of the main nodes of a chopper stabilized amplifier in these circumstances are shown in the graphs (a′) through (g′) of FIG. 13. However, because the waveforms of the graphs (a) and (a′), the waveforms of the graphs (b) and (b′), the waveforms of the graphs (c) and (c′), and the waveforms of the graphs (e) and (e′) are the same, descriptions of the graphs (a′), (b′), (c′), and (e′) are omitted.
A description will now be given of the graphs (d′), (f), and (g′) of FIG. 13. Because an actual operational amplifier circuit AMP has a limited slew rate and limited frequency characteristics, a slight deviation such as that shown in the graph (d′) is generated in the waveform of the second modulated signal Vmod2 after it has been amplified. This modulated signal Vmod2 is input into the demodulation circuit DEMOD and is demodulated by the modulation signal CK1 and the modulation signal nCK1. Because there is no deviation the modulation signal CK1 and the modulation signal nCK1, glitching such as that shown in the graph (f) is generated in the output signal OUT(t) after it has been demodulated.
Because the glitching generated in the output signal OUT(t) cannot be completely removed by a low-pass filter, it has the drawback that harmonic distortion is generated in the output signal LPOUT(t) after it has passed through the low-pass filter. The graph (g′) of FIG. 13 shows the waveform of the output signal LPOUT(t).